1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly to a semiconductor device having a silicon on insulator (SOI) structure and an insulated isolation region of a U-groove structure.
2. Description of the Prior Art
Accompanying the enhancement in the operating speed of silicon semiconductor devices the importance of a method for reducing the parasitic capacitance of a diffused layer or the like that forms a semiconductor became increasingly important. The SOI structure is a powerful method for reducing the parasitic capacitance. In the SOI structure, a single crystal silicon film is formed on a substrate or a film consisting of an insulator, and a semiconductor element is formed on the single crystal silicon film.
In the early days, the SOI structure had a structure of silicon on sapphire or spinel (SOS). It is a structure that has heteroepitaxially grown silicon on the surface of a sapphire or spinel substrate. However, this structure has a disadvantage in the profitability aspect. More important than that, there has been a significant problem in that the structure is difficult to handle and has a drawback in the workability due to too large a difference in the coefficients of thermal expansion between the substrate and the single crystal silicon film.
In the years that followed, along with the advancement in the fine geometry of semiconductor elements, the enhancement of the resistance to the soft errors induced by the .alpha. particles has become important. At the same time, along with the advancement in fine geometry of the semiconductor elements, research and development in the three-dimensional devices has been advanced. Together with such a trend there appeared SOI structures with new structures that are different from that of SOS.
These recent SOI structures are of three kinds. In a first structure, a single crystal silicon film is formed on a silicon substrate on whose surface is deposited an insulating film. The method of forming the structure is as follows. An insulating film is formed on the surface of a single crystal silicon film, an amorphous silicon or a polycrystalline silicon deposition film is formed on top of it, and the deposition film is converted to a single crystal by, for example, the irradiation of a laser beam. However, this structure has a defect in the crystallinity of the single crystal silicon film obtained.
In a second type of the recent SOI structures, a silicon oxide film is formed at a small depth from the surface of the single crystal silicon substrate. This structure is called separation by implanted oxygen (SIMOX). It can be obtained by implanting high energy hydrogen ions to the surface of the single crystal silicon substrate at a dose of 10.sup.17 to 10.sup.18 cm.sup.-2, and annealing the substrate at a high temperature of around 1300.degree. C. The minimum value of the dislocation density in the single crystal silicon layer on the surface of this structure is 10.sup.4 cm.sup.-2. The thickness of the silicon oxide film in this case is about 200 nm at the most. In applying the SIMOX structure to an actual device there exist two barriers. A first barrier is the profitability. When the SIMOX structure is attempted to be applied to an actual device, it is necessary to increase the thickness of the silicon oxide film. For the purpose of reducing the parasitic capacitance it is preferred that the thickness of the silicon oxide film beneath the single crystal silicon layer on the surface is large. Disregarding the question about the profitability, this can be realized by repeating several times an operation consisting of ion implantation, high temperature annealing and epitaxial growth of silicon. A second barrier is the junction leak caused by the crystal defects. Within the single crystal silicon layer on the surface of this structure there is distributed oxygen according to the Gaussian law. There are generated stacking faults as well as new dislocations due to the occurrence of the precipitation of the Gaussian distributed oxygens at temperatures of 600.degree. to 700.degree. C., in addition to the presence of the dislocations in the SIMOX structure as grown.
A third type of the recent SOI structures is called bonding and etch back SOI (BESOI). In this structure, a single crystal silicon plate is thermocompression bonded to a substrate which has a silicon oxide film on its surface. This structure has an advantage in that the crystal defect density of single crystal silicon on the silicon oxide film is low and that it can be fabricated inexpensively.
An example of adopting the BESOI struction in a 1K ECL RAM with a Schottky-clamped cell is disclosed IEDM Tech. Digest, 1988, pp. 870-872. In this example, a single crystal silicon plate is thermocompression bonded to a P-type silicon substrate which has a silicon oxide film with thickness of about 1 .mu.m formed on the surface. An N.sup.+ -type buried layer is formed by thinning the single crystal silicon plate by etching back, an N.sup.- -type epitaxial silicon film is formed on top of it, a U-groove that reaches the silicon oxide film on the P-type silicon substrate is created, an insulating layer is formed on the sidewall surface of the U groove and polycrystalline silicon is buried inside the U groove. A bipolar element is formed in the buried layer and epitaxial layer surrounded by the U groove. The objects of adopting this structure in the aforementioned report are an enhancement of the resistance to the soft errors due to .alpha. particles and a reduction of the parasitic capacitance. By the adoption of this structure, the parasitic capacitance between the silicon substrate and the collector region, for example, can be reduced to about one quarter of that in the case of adopting the conventional U-groove structure. It should be noted that the parasitic capacitance between the silicon substrate and the collector region occupies 60 to 70% of that for the entire bipolar element.
A reduction in the parasitic capacitance is important from the viewpoint of enhancing the product of the speed and the power for the purpose of increasing the operating speed of a semiconductor device. An enhancement of the operating speed the semiconductor device has been realized accompanying the advancement in the fine geometry of the semiconductor element that constitutes the semiconductor device. However, the enhancement in the operating speed of the semiconductor device means the passing of a large current in order to drive the fine patterned semiconductor elements. As a result, the current density in the semiconductor element is increased, and the generation of the Joule's heat is also rapidly increased locally. If the heat generation is left as is, there occurs a deterioration in the performance of the semiconductor element. For this reason, a reduction in the parasitic capacitance as well as an enhancement in the radiation effect of the heat generated in the semiconductor element are important for the enhancement of the operating speed of the semiconductor device. Now, there usually exists a gas with low heat conductivity above the semiconductor element. On the other hand, the bottom surface of the semiconductor element is brought into contact either directly or via a material with high heat conductivity with a metallic material that constitutes the package of the semiconductor device. Accordingly, it is typical to radiate the Joule's heat from the semiconductor element from the bottom surface of the semiconductor element.
However, in the BESOI structure described above, the heat radiation effect is inferior to that of the conventional case. The heat conductivity of the silicon oxide film is about two orders of magnitude smaller in comparison to that of single crystal silicon. For this reason, the heat radiation effect at the bottom surface of a bipolar element is reduced. Now, the heat radiation effect can be enhanced by reducing the thickness of the silicon oxide film on the silicon substrate in the BESOI structure. Since the enhancement in the heat radiation effect related to the thickness of the silicon oxide film and the reduction in the parasitic capacitance are in mutually reciprocal relationship so that it is impossible to make these two factors compatible in the BESOI structure described in the report cited above.